When solid state memory (such as NAND Flash) is read, the returned value depends upon a read threshold. In an example single level cell (SLC) system where a cell stores a single bit, any cell which has a stored voltage lower than the read threshold is interpreted to store a 1 and any cell which has a stored voltage higher than the read threshold is interpreted to store a 0. The value of this read threshold therefore affects performance of the system. In general, it is desirable to develop techniques which improve the process by which a read threshold is determined and/or inputs which are used to determine a read threshold. Improving a read threshold would, for example, reduce the number of read errors and may enable some codewords (e.g., which are uncorrectable using an error correction code when a less optimal read threshold is used during the read process) to be decoded (e.g., because the reduced number of read errors now falls within the error correction capability of the code).